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ASIC Implementation of Crypto Assist Controller

Author(s):

TEJAS HARJIBHAI VADHAVANIYA , GUJARAT TECHNOLOGICAL UNIVERSITY PG School

Keywords:

AHB Master, Direct Memory Access, Burst, Buffer-Memory, Crypto Core Engine, Linting

Abstract

In this Paper, I will design AHB master which can take data from slave. One efficient DMA Controller used to transfer of data from AHB master to Crypto core engine. Also I’ve to design two buffers to overcome the mismatch of size of data bus between AHB master and crypto core engine. So by combining all these modules, I’ll design one controller which takes data from AHB master and transfer them to crypto core engine through DMA controller. Also it’ll transfer data from crypto core engine to AHB master through DMA controller. The result of this project is a controller which can transfer data between memory and Crypto core engine. This controller can help us to make our communication fast and easy to handle large size of data which needs encryption or decryption

Other Details

Paper ID: IJSRDV2I3157
Published in: Volume : 2, Issue : 3
Publication Date: 01/06/2014
Page(s): 337-341

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