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3-D Discrete Wavelet Transform VLSI Architecture for Image Processing


Akshayraj Zala , Indus University, Ahmedabad, India; Ankur Changela, Indus University, Ahmedabad, India


VLSI Architecture, Image Processing, 3D Discrete Wavelet Transform (DWT) , MATLAB 7.9 tools.


In this paper, we propose an improved version of lifting based 3D Discrete Wavelet Transform (DWT) VLSI architecture which uses bi-orthogonal 9/7 filter processing. This is implemented in FPGA by using VHDL codes. The lifting based DWT architecture has the advantage of lower computational complexities transforming signals with extension and regular data flow. This is suitable for VLSI implementation. It uses a cascade combination of three 1-D wavelet transform along with a set of in-chip memory buffers between the stages. These units are simulated, synthesized and optimized by Xilinx 12.1 and MATLAB 7.9 tools.

Other Details

Paper ID: IJSRDV2I3476
Published in: Volume : 2, Issue : 3
Publication Date: 01/06/2014
Page(s): 1826-1831

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