High Impact Factor : 4.396 icon | Submit Manuscript Online icon |

SoC Verification:Approach & Strategy

Author(s):

Devansh Mehta , U V Patel Of College Of Engineering

Keywords:

Verification,System On Chip,UVM Methodology

Abstract

A VLSI system plays an important role among all other system and Verification plays important and a huge role in a VLSI life cycle. SOC is now a days very popular due to its reusability. So this paper gives a guidance related to SOC Verification and practical approach for SOC Verification which includes fusion of verification Environment with a mix C tests for debugging embedded processor and Verilog test bench for monitors and checkers. This paper gives an idea of how a SOC is going to verify covering all its functionality using verification methodology’s parameter such as functional coverage and code coverage. Using Verification Techniques and verification approach we can verify system level SOC.

Other Details

Paper ID: IJSRDV2I3541
Published in: Volume : 2, Issue : 3
Publication Date: 01/06/2014
Page(s): 1070-1075

Article Preview

Download Article