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AN EFFICIENT CONSTRUCTION OF ONLINE TESTABLE CIRCUITS USING REVERSIBLE LOGIC GATE

Author(s):

B.sree saranya , saveetha university

Keywords:

Reversible gate, single stuck fault ,testable gate.

Abstract

Testable fault tolerant system style has become important for several safety vital applications. On the opposite hand, reversible logic is gaining interest within the recent late to its less heat dissipating characteristics. Any Boolean algebra perform is enforced mistreatment reversible gates. This paper proposes a way to convert any reversible gate to a testable gate that's additionally reversible. The resultant reversible testable gate will discover on-line any single bit errors that embrace Single Stuck Faults and Single Event Upsets S.Karp et.al . The planned technique is illustrated mistreatment Associate in Nursing example that converts a reversible decoder circuit to an internet testable reversible decoder circuit.

Other Details

Paper ID: IJSRDV2I3607
Published in: Volume : 2, Issue : 3
Publication Date: 01/06/2014
Page(s): 1902-1905

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