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Design and Implementation of Network Intrusion Detection System using FPGA

Author(s):

Rashmi M Kambalimath , VTU, BELAGAVI; Gayatri Patil, VTU, BELAGAVI; Mahesh B Neelagar, VTU, BELAGAVI

Keywords:

FPGA, Network Intrusion Detection System

Abstract

Today’s network security is more important factor, which mainly depends on Network Intrusion Detection System (NIDS). NIDS system detects the erroneous data in the network. The FPGA is the most relevant appealing technology which has ability to punctually update the supported rules and detects the new emerging attacks in network. The issue is how to scale FPGA based NIDS implementation to ever faster network links. The important factor is to balance traffic over multiple hardware blocks. Each hardware block implements the whole rule set. The NIDS system can be implemented in software based technology as well. The hardware blocks of NIDS system uses CAM which results in achieving high speed up to 277.635MHz. The hardware implementation is carried out using Verilog HDL language on SPARTAN-6 FPGA kit.

Other Details

Paper ID: IJSRDV3I60524
Published in: Volume : 3, Issue : 6
Publication Date: 01/09/2015
Page(s): 1247-1251

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