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Design of STM-16 Frame Termination VLSI With GDI Techniques Using SRAM

Author(s):

G.GOWRI LAKSHMI , VIVEKANANDHA COLLEGE OF ENGINEERING FOR WOMEN,TIRUCHENGODE,TAMILNADU.; B.VIDYA, VIVEKANANDHA COLLEGE OF ENGINEERING FOR WOMEN,TIRUCHENGODE,TAMILNADU.; V.ABILA, VIVEKANANDHA COLLEGE OF ENGINEERING FOR WOMEN,TIRUCHENGODE,TAMILNADU.; M.NARGEESH BANU, VIVEKANANDHA COLLEGE OF ENGINEERING FOR WOMEN,TIRUCHENGODE,TAMILNADU.; K.BRINDHA DEVI, VIVEKANANDHA COLLEGE OF ENGINEERING FOR WOMEN,TIRUCHENGODE,TAMILNADU.

Keywords:

Gate Diffusion Input (GDI), STM-16, CMOS, high speed, low power, GDI technique, PTL, frame termination, SDH

Abstract

Power debauchery due to memories has become a major distress of current digital design.The proposed system to fabricate an advanced STM-16 using the GDI (Gate Diffusion Input) technology in the method. The STMs are constructed hierarchically with a nested structure. When trade with the data for high-speed digital forces, a nested level of four is essential for each STM; that is, the lowest level of container, virtual container, administrative unit (AU), AU group, and STM. GDI is a new technique of low power digital circuit design is described. This technique allows falling power consumption, delay and area of digital circuits, while maintaining low involvedness of logic design. Recital evaluation with traditional CMOS and various PTL design techniques is presented, with respect to the layout area, number of devices, delay and power dissipation, showing advantages and drawbacks of GDI as compared to other methods. A variety of logic gates have been design in 0.35 μm technology to compare the GDI technique with CMOS and PTL.

Other Details

Paper ID: IJSRDV4I30647
Published in: Volume : 4, Issue : 3
Publication Date: 01/06/2016
Page(s): 1360-1364

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