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Area Efficient UART

Author(s):

Swati Dubey , Dr.c.v.Raman.university; Miss Amrita Singh, Dr.c.v.Raman.university

Keywords:

Receiver, Transmitter, FPGA, UART etc.

Abstract

Universal Asynchronous Receiver Transmitter (UART) is the use of the serial communication protocol generally converts parallel data to serial data and vice versa, low velocity, short-distance, low-cost data exchange between computer & peripherals. During the genuine industrial production, sometimes we demand to simply integrate core part rather than full functionality of the UART. UART includes three modules which are received, the baud rate generator and transmitter. In the Baud Rate Generator part, before the overall design is synthesized into the UART design the Baud Rate Generator is incorporated. The role of frequency divider here we can use this at those places where we require lower frequent to operate the functionality. These frequency dividers automatically adjust for making it area efficient. All modules will be designed using VHDL and implemented on Xilinx FPGA development board.

Other Details

Paper ID: IJSRDV4I40236
Published in: Volume : 4, Issue : 4
Publication Date: 01/07/2016
Page(s): 85-88

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