High Impact Factor : 4.396 icon | Submit Manuscript Online icon |

Concatenated Code and MC DS CDMA Model In High Speed Vehicular Communication

Author(s):

Lakshmi Priya S , MAHENDRA ENGINEERING COLLEGE; ArunKumar M, MAHENDRA ENGINEERING COLLEGE; Giri K, MAHENDRA ENGINEERING COLLEGE

Keywords:

FPGA, MC DS CDMA, Modelsim synthesis, Serial and Parallel concatenated codes, Verilog HDL

Abstract

Multi Carrier Direct Sequence Code Division Multiple Access (MC DS CDMA) technique is the future generation mobile communication system and to access technology in future advances. Serial and Parallel concatenated codes are used for correcting the errors in data transmission. We proposed hybrid concatenated code for MC DS CDMA structure and estimate parameters like memory and design time. Use of interleavers reduces the burst errors between outer and inner code of encoding and decoding operation in the MC DS CDMA model. Modelsim synthesis technology is used to simulate the entire model and Verilog Hardware Description Languages (HDL) is used for design the codes of MC DS CDMA systems and the computer simulations of FPGA Simulation demonstrate that the performance of the proposed scheme is investigated.

Other Details

Paper ID: IJSRDV6I120454
Published in: Volume : 6, Issue : 12
Publication Date: 01/03/2019
Page(s): 590-593

Article Preview

Download Article