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VLSI Realization of Multipliers for Signal Processing Applications

Author(s):

Buvaneshwari. P , Valliammai Engineering College; Anitha. C, Valliammai Engineering College; Christal Diana .S. J, Valliammai Engineering College; Saravanakumar. C, Valliammai Engineering College

Keywords:

VLSI Realisation, Multipliers

Abstract

Multipliers plays an important role in many computation systems. Multipliers in VLSI require more hardware resources and more processing time and are used in digital processing systems. There are many researches in multiplier that result in reducing the power and thereby, causing delay. Generation of partial products in multipliers may result in large power consumption. Multipliers are used in applications such as DSP, FFT etc., they require large chip area. Normally array multiplier is based on its regular structure and it is compared with vedic multiplier. Though vedic multiplier work faster in all aspect with respect to other multipliers. Here in this work vedic multiplier is designed using tanner tool and perform spice simulation such as wave form and design rule.

Other Details

Paper ID: IJSRDV6I120474
Published in: Volume : 6, Issue : 12
Publication Date: 01/03/2019
Page(s): 669-672

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