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Fault Detection in Analog VLSI Circuits using Signal Flow Graph: A Review

Author(s):

Mukti Awad , ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Keywords:

Parametric Fault, Catastrophic Fault, Analog VLSI Circuit, SFG, Reverse Simulation, Analog Back-Tracing

Abstract

The purpose of this paper is both a review and an assessment of techniques presently available for fault detection in analog circuits. Analog circuits have been extensively used in industrial systems and their failure may make the systems work abnormally and even cause accidents. So if these faults cannot diagnose and remove at early stage it will cause problem. There are various faults occur in analog VLSI circuits during manufacturing of any analog circuits and if these faults are not diagnose at initial stages they will make changes in the output of the circuit and overall cost will increase. In this paper an approach is taken to remove parametric and catastrophic faults. A very simple, efficient and structural approach is taken which is based on signal flow graph. In this back-tracing is done using inverted signal flow graph which is used to calculate tolerance of the component. This approach is applicable to various linear analog VLSI circuits. For the detection of faults integrator circuit is used. All the circuits are simulated with the help of MATLAB/Simulink tool.

Other Details

Paper ID: IJSRDV7I80041
Published in: Volume : 7, Issue : 8
Publication Date: 01/11/2019
Page(s): 114-117

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