A Novel Power Efficient Reversible Asynchronous Counter |
Author(s): |
| Raju Odela , SRM University; Sangani Rahul Gowtham, Hazrathiah, SRM University; Hazrathiah, SRM University |
Keywords: |
| Reversible Logic, Counter, RHG Gate,T-Flipflop. |
Abstract |
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Due to the high density of the chip, the power dissipation increases. So we are in the need of the best power optimization techniques. Reversible logic is the one which is used to optimize the power getting wasted. Reversible logic finds its applications in the field of low power CMOS designs, quantum computing, nanotechnology and optical computing. There are number of circuits designed by Reversible logic and possess their own importance in the digital world In this paper we have proposed a new reversible T-Flip flop using a newly proposed RHR(Raju Hazar Rahul) Gate. It is also shown that the proposed one is better than the existing one. Using the proposed design we also have implemented the counters which owns many advantages compared to the existing one. |
Other Details |
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Paper ID: IJSRDV3I90552 Published in: Volume : 3, Issue : 9 Publication Date: 01/12/2015 Page(s): 1118-1121 |
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