An Efficient Concurrent BIST for Rom Module |
Author(s): |
| Hamsa C , BANGALORE INSTITUTE OF TECHNOLOGY; Murali Narasiham S, BANGALORE INSTITUTE OF TECHNOLOGY |
Keywords: |
| Built-in self-test (BIST), testing, Design for testability |
Abstract |
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Input vector monitoring concurrent built-in self-test schemes perform testing during the normal operation of the circuit without imposing a need to set the circuit offline to perform the test. These schemes are evaluated based on the hardware overhead and the concurrent test latency i.e., the time required for the test to complete, whereas the circuit operates normally. In this brief, we present a novel input vector monitoring con current BIST scheme for ROM module, which is based on the idea of monitoring a set (called window) of vectors reaching the circuit inputs during normal operation. The proposed scheme is shown to perform signiï¬cantly better than previously proposed schemes with respect to area and power. |
Other Details |
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Paper ID: IJSRDV4I31110 Published in: Volume : 4, Issue : 3 Publication Date: 01/06/2016 Page(s): 1277-1279 |
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