Implementation of AMBA Bus Arbiter using Multilevel AMBA AHB Round Robin and Fixed Priority Scheme

On-chip bus architecture serves a very important role in on-chip design system. Now days there are many on-chip bus architecture design are provided by different company. One of the most popular is advance microcontroller bus architecture which is popularly known as AMBA 1.0. AMBA have a advantage that it is open specification i.e. AMBA serve as a framework for system on chip design. In On Chip System problem arise when number of master trying to sense a single data bus. Then resolutions of a required become an issue. The system performance depends upon a ability to resolve this resolution problem. The AMBA protocol use logical assignment of chance to different masters according to their priority to take over the bus for data transmission. AMBA architecture define three specification. They are advance high performance bus, advance peripheral bus and advance system bus. Among all three specification AHB have high bandwidth and this make AHB as first choice for system designer. While resolving the problem priority resolution, arbiter plays an important role. Arbiter is a digital circuit and working of it depends upon the arbitration algorithm. According to arbitration algorithm arbiter decide to give grant to master to access bus. In this project we design arbitration algorithm, according to it arbiter give grant to different masters. The device utilization of the proposed architecture is around 39% to 40%.xlinx simulator 14.5 vetex4 IC is use to implement and model sim simulator 10.1b is use for simulation.