Hardware Implementation of Higher Order Median Filter with Effective Edge Preservation |
Author(s): |
| Vanathi M , PSNA COLLEGE OF ENGINEERING AND TECHNOLOGY; Dr. A. Kaleel Rahuman, PSNA COLLEGE OF ENGINEERING AND TECHNOLOGY |
Keywords: |
| Median Filter, Data Driven Clock Gating, Adaptive Median, Mean Value |
Abstract |
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Design of median filter capable of filtering 36 pixels which has the efficiency of a conventional filter of size 9. This is achieved by dividing the sliding window matrix of a 6X6 matrix into four 3X3 matrix. Main idea is to synchronize all four 3X3 matrix for Median operation so that it can reproduce conventional 6X6 matrix sliding window. Four different mean values are replaced at a time making the processing speed comparatively quicker than conventional 6X6 Median sorting. Filter size is fixed and the Median operation is done through adaptive median sorting algorithm to minimize the processing time. Data driven clock gating techniques are used in the system to reduce switching transition. |
Other Details |
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Paper ID: IJSRDV6I90041 Published in: Volume : 6, Issue : 9 Publication Date: 01/12/2018 Page(s): 43-45 |
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