Introduction to VIP with PCI Express Technology |
Author(s): |
| Rutva Pathak , Gujarat Technological University, Ahmedabad |
Keywords: |
| ASIC, TL, DLL, Lane, Link, Verification, VIP (Verification Intellectual Property) |
Abstract |
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This paper describes latest technology PCI Express and VIP for reusability purpose as it is necessary for today's faster verification needs. It is explained using PCIe Verification IP. This verification is achieved by developing Device reference module. PCIe is high speed serial bus that supports 2.5 GT/s to 16 GT/s. PCIe is point to point device with lane and link concept that support full duplex communications between two devices. Verification Intellectual Property is component that behaves exactly like PCIe design and used for verification of the design. Additionally it has several features like generation, checking and coverage. PCIe VIP is architecture using system Verilog HVL. |
Other Details |
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Paper ID: IJSRDV1I3098 Published in: Volume : 1, Issue : 3 Publication Date: 01/06/2013 Page(s): 797-800 |
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