Implementation of Viterbi Decoder on FPGA to Improve Design |
Author(s): |
| Prof. K. C. Dave , L. D. College of Engineering, Gujarat Technological University, Ahmedabad-380015; Palak Gohel, L. D. College of Engineering, Gujarat Technological University, Ahmedabad-380015 |
Keywords: |
| Convolution encoder, Constraint length, Viterbi decoder, FPGA, Traceback Methods |
Abstract |
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In the data transmissions over wireless channels are affect by attenuation, distortion, interference and noise, which affects the receiver's ability to receive correct information. Convolution coding with Viterbi decoding is a FEC technique that is particularly suited to a channel in which transmitted signal is corrupted mainly by additive white Gaussian noise (AWGN).Convolutional codes are used for error correction. They have rather good correcting capability and perform well even on very bad channels with error probabilities. Viterbi decoding is the best technique for decoding the Convolutional codes but it is limited to smaller constraint lengths. Viterbi algorithm is a well-known maximum-likelihood algorithm for decoding of convolutional codes. |
Other Details |
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Paper ID: IJSRDV1I4053 Published in: Volume : 1, Issue : 4 Publication Date: 01/07/2013 Page(s): 1033-1036 |
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