FPGA Implementation of Mix and Inverse Mix Column for AES Algorithm |
Author(s): |
| Neethan Elizabeth Abraham , Federal Institute of Science and Technology (FISAT) Angamaly, India; Tibin Thomas, Federal Institute of Science And Technology(FISAT) Angamaly, India |
Keywords: |
| mix column, inverse mix column |
Abstract |
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advanced encryption standard was accepted as a Federal Information Processing Standard (FIPS) standard. In order to reduce the area consumption and to increase the speed mix and inverse mix column transformation can be used as a single module .This paper contains design of new architecture, its simulation and implementation results and comparison with previous architecture. |
Other Details |
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Paper ID: IJSRDV1I9071 Published in: Volume : 1, Issue : 9 Publication Date: 01/12/2013 Page(s): 1981-1984 |
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