Study and Comparison of Open Source and Licensed VLSI CAD Tools using CMOS Design Methodology

the design of VLSI circuits can be achieved at many different refinement levels from the most detailed layout to the most abstract architectures. VLSI design has been the study of electronic design automation and related semiconductor science, and many software tools have been written to solve one or more problems associated with the VLSI design flow. VLSI CAD tools have emerged as a boon in assisting VLSI Design engineers to choose and optimize various design models and technology. The importance of CAD tool can be understood by seeing its complex algorithms, data structures and modeling assumptions used in each of the following steps namely logic synthesis, logic verification, layout synthesis, timing verification and many others. Thus a number of standard tools have emerged to design and analyze VLSI chip from one step of the flow to another. Computer-aided design (CAD) is the use of computer systems to assist in the creation, modification, analysis, or optimization of a design. Computer aids in VLSI now offer advance capabilities so engineers can better visualize their product designs. The VLSI CAD tools work sideways together with chip designers to design and analyze entire semiconductor chips. In this paper, a number of open-source and licensed CAD tools will be studied and compared. The tools have been used for various commercial and academic purposes in various companies and universities at different design abstraction levels. This paper will help to comprehend many EDA tools and help to select appropriate computer aid for chip design.