Robust IP Router Architectures and Technologies-A Review |
Author(s): |
| Nikita , swami Devi Dyal institute of engineering and techonology; Pardeep kumar, Swami Devi Dyal Institute Of Engineering & Techonology,Barwala |
Keywords: |
| ISP’s, network on chip, robust routers, internet protocol |
Abstract |
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In the emerging environment of high performance IP networks, it is expected that local and campus area backbones, enterprise networks, and Internet Service Providers (ISPs) will use multi gigabit and terabit networking technologies where IP routers will be used not only to interconnect backbone segments but also to act as points of attachments to high performance wide area links. More importance must be given to new efficient architectures for routers in order to make more effective network. In this paper, we identify important trends in router design and outline some design issues facing the next generation of routers. It is also observed that the achievement of high throughput IP routers is possible if the critical tasks are identified and special purpose modules are properly tailored to perform them. Multiprocessor system on chip is emerging as a new trend for System on chip design but the wire and power design constraints are forcing adoption of new design methods. Researchers pursued a scalable solution to these problems i.e. Network on Chip (NOC). |
Other Details |
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Paper ID: IJSRDV2I10260 Published in: Volume : 2, Issue : 10 Publication Date: 01/01/2015 Page(s): 564-567 |
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