FPGA Implementation of LDPC Codes: A Review |
Author(s): |
| Neelam Choudhary , HCTM, Kaithal; Er. Rishi Pal, HCTM, Kaithal |
Keywords: |
| LDPC Codes, FPGA Implementation, Hamming Codes |
Abstract |
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In this paper we have taken a review of the LDPC codes and their performance evaluation that has been implemented on FPGA. This paper constitutes an attempt to highlight some of the main aspects of the theory of low-density parity check (LDPC) codes. It is intended for a mathematically mature audience with some background in coding theory, but without much knowledge about LDPC codes. |
Other Details |
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Paper ID: IJSRDV2I12070 Published in: Volume : 2, Issue : 12 Publication Date: 01/03/2015 Page(s): 266-267 |
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