Write Transfer of AMBA-AHB Lite Master Communication Protocol |
Author(s): |
| Harshil Gajjar , GTU PG School; Nirav Patel, GTU PG School |
Keywords: |
| AMBA (Advanced Microcontroller Bus Architecture), AHB-Lite (Advanced High Performance Bus-Lite), Burst, SystemVerilog, ModelSim |
Abstract |
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In this paper, a write transfer of AMBA-AHB Lite communication protocol is designed and implemented. AMBA-AHB Lite communication protocol is designed using master-slave topology. To perform efficient write operation, a core is designed for communication between a master unit and a slave unit. This process involves the master unit, which generates various transactions/operations and a slave unit to receive these transaction and respond accordingly. The write transfer operations are generated using SystemVerilog and ModelSim 6.3f. The communication is configured for 32bit wide Address bus and Data bus. |
Other Details |
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Paper ID: IJSRDV2I1357 Published in: Volume : 2, Issue : 1 Publication Date: 01/04/2014 Page(s): 723-725 |
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