Design of FPGA based Low Power Embedded System with Application Specific Sensors

In this paper we proposed a low power Embedded system whose multiple FPGA based switches are operated independently according to the application specific sensors like regional movement detectors in video stream. This system consists of a LED switching circuit, embedded vision system communicating each other through GPIO. All IPs are provided with Verilog codes in RTL, as well as Verilog codes and EDIF netlist of synthesized gate level logic which are verified in FPGA emulation. They are setup as semiconductor IPs in ready-to-use state in remote server computer Embedded vision system is implemented by 32 bit processor, Open RISC and peripherals - SDRAM, SSRAM, DMA, TFT-LCD, GPIO and CIS, etc. - connected on Wishbone on-chip bus. One bus structure is too busy to provide enough high speed transferring of image data from camera both to TFT-LCD and to the processor that is executing motion detecting program. So segmented bus structure is introduced to achieve higher performance. It is verified by simulation that the performance of segmented bus structure is more than two times better than one bus structure. The FPGA implementation confirms higher data transferring speed, suitable for a real-time video application.