Design & Implementation 16-Bit Low Power Full Adder Using Reversible Logic Gates

Everyday new technology which is faster, smaller and more complex than its predecessor is being developed. The increase in clock frequency to achieve greater speed and increase in number of transistors packed onto a chip to achieve complexity of a conventional system results in increased power consumption. Almost all the millions of gates used to perform logical operations in a conventional computer are irreversible. Reversible logic is gaining interest in the recent past due to its less heat dissipating characteristics. It has been proved that any Boolean function can be implemented using reversible gates. That is, every time a logical operation is performed some information about the input is erased or lost and is dissipated as heat. Reversible logic is one of the latest technologies having promising applications in Quantum Computing. Reversible logic has become one of the most promising research areas in the past few decades and has found its applications in several technologies; such as low power CMOS, Nano-computing and optical computing. Reversible logic gates are widely known to be compatible with future computing technologies which virtually dissipate zero heat. Reversible logic gates produce zero power dissipation. So these can be used forlow power VLSI design. Adders are fundamental building blocks in many computational units. For this reason, we have simulated several adder circuits using the reversible gates. This paper implements a design of Adder using reversible logic gates. This paper proposes a new 16-bit reversible adder using 4*4 Reversible DKG gates that can work singly as a reversible full adder.