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Implementation of Ternary Logic Gates using CNTFET


Rahul Kashyap , Gujarat Technological University, Ahmedabad


Ternary Logic, CNTFETs, MOSFETs and Sequential Elements


An alternative to Binary Logic is Ternary Logic Design Technique by which energy efficiency and Simplicity can be easily accomplished. The design based on Ternary Logic reduces the circuit overheads such as interconnects and chip area. Also, CNTFET based designs increases the Performance and reduces the Power Consumption of the circuit. In this work, Sequential Element using Ternary Logic Design and based on CNTFET’s are proposed which provides a glimpse over the present CMOS technology.

Other Details

Paper ID: IJSRDV2I3170
Published in: Volume : 2, Issue : 3
Publication Date: 01/06/2014
Page(s): 351-355

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