The Phase Locked Loop Simulation with 90nm Technology |
Author(s): |
| Panchal Sachin Pravinkumar , xyz; panchal sachin, Faculty of Engineering, Shree Saraswati Education Sansthan?s Group of Institutions, Rajpur-382740,INDIA |
Keywords: |
| Phase Detector, Charge Pump, VCO(Voltage Controlled Oscillator), Frequency Divider |
Abstract |
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PLLs are used in almost every communication system PLL is a closed loop system that Locks the Phase of its output signal to an input reference signal. The signal from the feedback path is compared to the input reference signal until two signals are locked and if the Phase is unmatched, this is called the unlocked state.Some of its uses include recovering clock from digital data signals, performing frequency, phase modulation and demodulation, recovering the carrier from satellite transmission signals ,as frequency synthesizer and jitter reduction . The Present work focuses on the analysis of the Parameter of a PLL like jitter, Power Consumption, input frequency, output frequency system using 90 nm Technology with NGSPICE 26 Simulation. PLL System consist of the Phase Detector (PFD), Charge Pump(CP),Voltage Controlled Oscillator(VCO),Low Frequency divider. |
Other Details |
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Paper ID: IJSRDV2I3537 Published in: Volume : 2, Issue : 3 Publication Date: 01/06/2014 Page(s): 894-896 |
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