study of AES implementation on FPGA by using Rijndael algorithm |
Author(s): |
| Lal Bahadur , Takshshila Institute of engineering & technology, jabalpur; Bhupendra Badoniya, Takshshila Institute of engineering & technology, jabalpur |
Keywords: |
| cryptography, FPGA, AES, Rijndael, EEC, ASIC, SRAM |
Abstract |
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Cryptography was and still is one of the hot research areas. The growing demand for cryptography arises from the desire to secure networks and data against potential intruders. With the use of more handheld wireless devices and increasing networking and wireless data transfer, the issue of security is being addressed from many different directions. The National Institute of Standards and Technology (NIST) selected the Rijndael algorithm as a new Advanced Encryption Standard (AES) [1] in 2001. This standard was first developed for secure data encryption/ decryption for high-end applications. This paper presents a comprehensive survey on the use of Field programmable Gate Array (FPGA) in cryptographic applications as well as recent Research and Development (R&D) trends in this area. We discuss the advantages and drawbacks of FPGA for cryptographic applications. We then describe some countermeasures to overcome these drawbacks. Finally, we do a brief survey on Advanced Encryption Standard (AES) / Rijndael and Elliptic Curve Cryptography (ECC) algorithm implementations on FPGAs. |
Other Details |
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Paper ID: IJSRDV2I6013 Published in: Volume : 2, Issue : 6 Publication Date: 01/09/2014 Page(s): 165-168 |
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