A Low Power Multiplication and dividing Technique using Radix |
Author(s): |
| Raj kumar Agarwal , Institute and Technolgy and Management , bhilwara ; Dheeraj Jain, Institute of Technology and Management, Bhilwara |
Keywords: |
| Radix-4, Radix-8 |
Abstract |
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The general objective of this paper is to develop methods to reduce the power consumption of arithmetic modules, while maintaining the delay unchanged and keeping the increase in the area to a minimum. Here we illustrate some techniques for a radix-4 divider realized in 0:6_m CMOS technology and compare it with radix-8. We obtained a power consumption reduction of 35% with respect to the standard implementation. The techniques used here should be applicable to a variety of arithmetic modules which have similar characteristics. |
Other Details |
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Paper ID: IJSRDV2I6089 Published in: Volume : 2, Issue : 6 Publication Date: 01/09/2014 Page(s): 88-90 |
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