A Review of Different Delay Locked Loop Based Clock Generators |
Author(s): |
| Anupama , Lakshmi Narain College of Technology and Science ; Dr. Soni Changlani, Lakshmi Narain College of Technology and Science ; Ayoush Johari , Lakshmi Narain College of Technology and Science |
Keywords: |
| Delay locked loop, clock generation, skew, jitter |
Abstract |
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In this paper we present a review of different Delay Locked Loop (DLL) based clock generator circuits. The paper briefly discusses concept of DLL and different key parameters which determine the performance of these delay locking circuits. DLL finds vast applications in communication systems and digital logic circuits. Here we have confined our study to clock generation application only. Basic idea and comparison of some of the clock generation circuits and their comparison has been carried out to find out the factors where improvement is required. |
Other Details |
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Paper ID: IJSRDV3I120501 Published in: Volume : 3, Issue : 12 Publication Date: 01/03/2016 Page(s): 850-852 |
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