A New Approach for Generation of Test Program for Detection of Hardware Fault in VLIW Processor

Very long instruction word processors are increasingly employed in a large range of embedded signal processing which is provide high performances with reduced clock rate and power consumption. Software-based self-test (SBST) methods are consolidated and effective solution to detect faults in the processors both at the end of the production phase or operational life. In this report we present a new method for automatic generation of efficient test programs specifically oriented to VLIW processors. The proposed method based on generic SBST algorithms automatically generates effective test programs. It is able to reach the detect fault, while minimizing the test duration and test code size. The method consists of four types of methods and can deal with different VLIW processor models. The main goal of the project is to show that in the case of VLIW processors, it is automatically generate an effective test program able to detect fault with minimal test time and required resources.