Design of Phase Locked Loop as a Frequency Synthesizer |
Author(s): |
| Muttappa , DR. AIT COLLEGE BENGALURU; Akalpita L Kulkarni, DR. AIT COLLEGE BENGALURU |
Keywords: |
| Phase Locked Loop, Phase Frequency Detector, Charge Pump, Low Pass Filter, Voltage Controlled Oscillator |
Abstract |
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In this paper a PLL is designed and implemented. A PLL is a closed loop frequency system that locks the phase of an output signal to an input reference signal. The term ―lock refers to a constant or zero phase difference between two signals. The signal from the feedback path is compared to the input reference signal, until the two signals are locked. If the phase is unmatched, this is called the unlocked state, and the signal is sent to each component in the loop to correct the phase difference. These components consist of the PFD, CP, LPF, VCO and divide by counter. The application I chose in designing the PLL was a frequency synthesizer. A frequency synthesizer generates a frequency that can have a different frequency from the original reference signal. |
Other Details |
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Paper ID: IJSRDV3I30054 Published in: Volume : 3, Issue : 3 Publication Date: 01/06/2015 Page(s): 2590-2595 |
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