High Performance Low Power 10T Full Adder |
Author(s): |
| Naveen Kumar Sigroha , YMCAUST FARIDABAD; Bal Krishan, YMCAUST FARIDABAD; Resham Singh, YMCAUST FARIDABAD |
Keywords: |
| Full adder; 10T adder; low power; low delay adder; Arithmetic operations; Fast carry propagation; lowest carry delay adder |
Abstract |
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High Performance Low Power 10T Full Adder (FA) is presented in this paper. FA is an essential component for the design of all types of processors viz. microprocessors anddigital signal processors (DSP) etc. Adders are the core element of complex arithmetic operations like addition, multiplication, division, exponentiation etc. In most of these systems adder lies in the critical path that affects the overall speed of the system. So improving the performance of the 1-bit FA circuit is a significant goal. The present work proposes an energy efficient FA circuit with faster switching of output that reduces the serious problem of carry propagation from one adder to another adder. Result shows 10.56% improvement in Sum delay, 91.46% improvement in Carry delay over the other types of adders with comparable performance of 8T and 9T FAs. The simulation has been carried out on Tanner EDA tool 14.1 at 45nm technologies. |
Other Details |
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Paper ID: IJSRDV3I31186 Published in: Volume : 3, Issue : 3 Publication Date: 01/06/2015 Page(s): 2770-2772 |
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