Design an Efficient VLSI Architecture for an Orthogonal Transformation |
Author(s): |
| Himanshu Upadhyay , Shanstilal Shah Engineering college; Prof.A.N.Devani, Shanstilal Shah Engineering college |
Keywords: |
| VLSI architecture, Orthogonal Transformation, DCT |
Abstract |
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Many Orthogonal transform techniques are available. Among the orthogonal transform DCT is widely used technique in DSP. DCT is utilized in many algorithm related to image compression. This transform requires large number of multiplications and additions. Large number of hardware elements is required for the same, special purpose designed hardware should be used, which gives high efficiency and throughput. Many transform algorithms offers high speed as well as lower silicon area. In this project we have tried to optimize power at algorithmic level, architectural level and logic level. We have implemented architecture using row column decomposition technique implemented with distributed arithmetic, a multiplier less architecture. It contains features so as to dynamically reduce computation. |
Other Details |
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Paper ID: IJSRDV3I40174 Published in: Volume : 3, Issue : 4 Publication Date: 01/07/2015 Page(s): 158-165 |
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