Design Advanced Encryption Standard Algorithm with Fault Detection |
Author(s): |
| Ruchi R. Vairagade , G.H. RAISONI ACADEMY OF ENGINEERING AND TECHNOLOGY; Sanjay.B. Tembhurne , G.H. RAISONI ACADEMY OF ENGINEERING AND TECHNOLOGY |
Keywords: |
| AES, VHDL |
Abstract |
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Advanced Encryption Standard (AES) is the standard for secret key encryption. the goal of AES is to achieve secure communication and it is based on design principle known as substitution and permutation network.as this is 128 bit AES algorithm since it will accepts 128 bits of plaintext and master key of size128 bits. The 128 bits cipher text block is produce after the plaintext block is processed by round function number of times. This algorithm uses a combination of Exclusive-OR operation (XOR), Substitution with S-Box, Row and Column rotation and a Mix column. Plaintext, ciphertext and intermediate state block can be depicted as 4*4 matrix form. In this paper, in the proposed work present the details of the 128 bits AES Encryption and Decryption structure and conduct a fault injection attack against the unprotected AES. The methodology to be employed is VHDL. |
Other Details |
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Paper ID: IJSRDV3I50086 Published in: Volume : 3, Issue : 5 Publication Date: 01/08/2015 Page(s): 217-220 |
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