A Novel Design of 3-Bit Gray Code Counter Using Reversible Logic Gates |
Author(s): |
| Arundhati Chattopadhyay , NSHM Knowledge Campus,Durgapur; Piyush Kumar, NSHM Knowledge Campus, Durgapur; Shashank Kumar Singh, NSHM Knowledge Campus,Durgapur |
Keywords: |
| Reversible logic gate, Counter, Constant input, Garbage output, Delay |
Abstract |
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The Reversible logic synthesis technique is most important part of the long-term future of computing due to its low power dissipating characteristic. In recent years, reversible logic circuits have attracted considerable attention in improving some fields like nanotechnology, quantum computing, cryptography, optical computing and low power design of circuits due to its low power dissipating characteristic. In this paper we proposed the design of 3-bit Gray Code counter which uses reversible gates and derived quantum cost, constant inputs, garbage output and number of gates to implement it. |
Other Details |
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Paper ID: IJSRDV4I110071 Published in: Volume : 4, Issue : 11 Publication Date: 01/02/2017 Page(s): 370-372 |
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