Power Estimation and Measurement in VLSI Circuits |
Author(s): |
| Ankit Gupta , Inderprastha Engineering College, Ghaziabad, India; Dr. Amita Agnihotri, Inderprastha Engineering College, Ghaziabad, India |
Keywords: |
| cadence, leakage power, conventional, stack |
Abstract |
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The Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of system design tools, the application of leakage power consumption budget is estimated after RTL synthesis. We propose in this article a method based on measurements which allows to estimate the leakage power dissipation using the power tool Cadence provided by Cadence Design Systems. It helps the system designer to determine leakage power dissipation early in the design flow with best adequacy between high performances and low power consumption and saves lots of their time. |
Other Details |
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Paper ID: IJSRDV4I21668 Published in: Volume : 4, Issue : 2 Publication Date: 01/05/2016 Page(s): 1759-1762 |
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