High Speed Multiplier Design with Column/Row Bypass Method and Tabulation Multiplication |
Author(s): |
| Ruhi Samaiya , IES College of Technology, Bhopal ; Ankit Shivhare, IES College of Technology, Bhopal; Ashish Raghuwanshi, IES College of Technology, Bhopal |
Keywords: |
| Tabulation Multiplication, Multiplier Design |
Abstract |
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in most of the digital signal processing operations such as linear convolution, circular convolution, cross correlation, auto correlation, discrete Fourier transform, fast Fourier transform etc multiplication operation takes large time for computation. The multiplication is also time consuming process in microprocessor and microcontroller arithmetic and logical operations. The computational time of multiplication operation depends on the speed of adder circuit which is affected due to the carry propagation delay. In this paper the Tabulation method of multiplication is discuss. The tabulation method of multiplication reduces the complexity of multiplication and its computational time. This will improve the computational time, latency and throughput. |
Other Details |
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Paper ID: IJSRDV4I30340 Published in: Volume : 4, Issue : 3 Publication Date: 01/06/2016 Page(s): 370-371 |
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