Fault Detection & Correction in AES Algorithm for Satellite Communication

The advanced encryption standard (AES) is the important published cryptographic algorithms. Many computations cycles is required in AES algorithm. AES uses four operations in different rounds such as sub bytes, shift rows, mix columns and additional key round transformations. In military satellites, security is essential. In satellite fault tolerance is very important. Due to radiation fault is induced in the on board electronic systems such as memories, processors etc. before sending the data to ground faults must be detected and corrected. If ground station receives faulty data the users request for data retransmission. Due to radiation, single bit flips called single event upsets (SEU) is induced in satellite on board electronic devices.To avoid faulty data transmission to ground station a unique fault tolerant model is proposed in this thesis. In this paper five modes such as CBC ,OFB,CTR,CFB, and ECB is presented. In this paper we observed that single bit errors can propagate from one block to other blocks depending on AES modes. A single bit corrupts one block of da ta in ECB,CFB,CTR and CBC modes and on the other hand in OFB a single bit corrupts whole data starting from the point. Hence for satellite communication OFB mode is not used.