Design of Enhanced HDLC Protocol using VHDL |
Author(s): |
| Ku. Rupal P. Bende , B.D.College of engineering; Mr. A. P. Bagade, B.D.College of Engineering; Mrs. S. R. Salwe, B.D.College of Engineering |
Keywords: |
| HDLC, VHDL, FCS, FPGA, Verilog HDL, Xilinx |
Abstract |
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Data communication over the network is efficiently carried out with the help of protocol. Protocols are specified for each layer of OSI reference model. HDLC is one of the protocols defined for data link layer. It is bit oriented protocol and used to send the data in proper frame. This paper reveals design and simulation of HDLC transceiver by using VHDL which also shows that bit rate can be increased significantly. |
Other Details |
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Paper ID: IJSRDV4I50845 Published in: Volume : 4, Issue : 5 Publication Date: 01/08/2016 Page(s): 1620-1623 |
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