Design and Simulation of Observer-Controller Digital Phase Locked Loop

In the optical communication in a backbone infra-structure, flexibility means, for example, programmable bitrates requiring a PLL with robust operation over a wide range of frequency range. A wide range PLL could be used by different protocols and applications so that maximize the reusability. A digital phase-locked loop (DPLL) has been recently developed to exploit the increasing transistor speed of modern process technology. By employing a digitally controlled oscillator (DCO) and a time-to-digital converter (TDC), the loop filter of a DPLL becomes all-digital. Instead of designing the loop filter by digitizing a continuous-time loop response as has been commonly done, more sophisticated control schemes can be employed. In this paper, we propose to design the feedback loop in the time-domain by first modeling the DCO and TDC as a noisy “plant� in state-space form. Based on a Kalman observer of the “plant,� the proposed approach then generates optimal control signals that accurately account for the additive noise as well as the transport delay in the digital feedback system. The proposed observer-controller loop filter achieves rapid transient response time and significantly reduces the steady-state phase noise jitter compared to the conventional DPLL