Design and Simulation of Extended Golay Code Encoder and Decoder

In the wireless communication system the receiver has the ability to detect and correct the error from the received information. Receiving the error is an important issue, so it provides the processor for correcting the information of the data. There are some different methods for the implementation of the hardware and software. The communication distance between transmitter and receiver play an important role because the transmission of data between transmitter and receiver depends on length of communication. Multiple bits of information transmitted from transmitter changed due to the effect of noise in transmitted signal. This causes intense loss in many of the cases. This paper presents the brief explanation of FPGA (Field Programmable Gate Array) based simulation and design of Golay Code (G23) and extended Golay code (G24) Encoding scheme. For encoding the data packet this paper use the Golay Encoder for the optimization of the time delay of the operational circuit design to encode the data packet