A Review on Floating Point Arithmetic Unit for Computing Requirement

Approximate computing has become one of the most popular computing paradigms in the era of the Internet of things and big data. It takes advantages of the error-tolerable feature of many applications, such as machine learning and image/signal processing, to reduce the resource required to deliver certain level of computation quality. Floating point arithmetic unit is widely used in many areas, especially scientific computation and signal processing. For many signal processing, and graphics applications, it is acceptable to trade off some accuracy for faster and better implementations. Multiplication is the second basic operation of arithmetic Floating point unit. FPU is a part of computer system specially designed to carry out operation on floating point number. Floating point unit is widely used in many areas. This paper shows review of IEEE 754 standard floating point arithmetic unit which will perform multiplication, addition and subtraction function on 32bit operand. A system’s performance is generally determined by the performance of the multiplier, because the multiplier is generally the slowest element in the system. Single-precision floating-point IEEE-754 standard Adder/Subtractor and Multiplier modules with high speed and area efficient are presented. The arithmetic operations are performed on the significant part of the IEEE format.