Design of Reconfigurable Multichannel MRI Receiver on FPGA |
Author(s): |
| Diwakar Singh , VJTI MUMBAI; Milind Datkhile, VJTI MUMBAI; P. B. Borole, VJTI MUMBAI |
Keywords: |
| FPGA, MRI Receiver, ADC, Under sampling, Digital down Converter, Ethernet |
Abstract |
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A design presented for a Multichannel digital Receiver system for MRI that overcomes the concerns associated with solution regarding cost, scalability. Commercial receivers used for parallel MR imaging often-present researchers with hurdles such as high cost per channel, low scalability for multiple coils and non-accessibility to intermediate data for research. MR signal from up to 16 coils are band passed sampled at RF, with all subsequent down conversion performed on single chip Field Programmable Gate Array (FPGA). The Resulted device is in order of magnitude cheaper and much more scalable. |
Other Details |
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Paper ID: IJSRDV5I11003 Published in: Volume : 5, Issue : 1 Publication Date: 01/04/2017 Page(s): 1600-1602 |
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