PPM Adder Design using XNOR-XOR Function |
Author(s): |
| Rajeev Kumar , School of Technology, Glocal University Saharanpur UP, India; Dr. Vikram Singh, School of Technology, Glocal University Saharanpur UP, India; Mr. Prem Kumar Hawal, School of Technology, Glocal University Saharanpur UP, India |
Keywords: |
| PPM Adder, Power, Delay, PDP |
Abstract |
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In this research work proposed a new 12 transistor PPM adder design using XNOR-XOR functions. A proposed PPM adder is reduced the transistor and while the better performance of the existing PPM adder. This better performance analysis of PPM adder is presented and significant reduction in power consumption, peak power and propagation delay. The entire PPM adder simulation result is obtained at TSMC 90nm CMOS technology. |
Other Details |
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Paper ID: IJSRDV5I21042 Published in: Volume : 5, Issue : 2 Publication Date: 01/05/2017 Page(s): 1066-1069 |
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