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Implementation of AMBA-APB Protocol Using Energy Efficient System Resources

Author(s):

Monika Nema , Adina Institute; Dilip Ahirwar, Adina Institute; Anjan Kumar Gupta, Adina Institute

Keywords:

MPSOC, NOC, AMBA, Flip-Flop (Master Slave)

Abstract

The majority of recent embedded systems are supported MPSOCs (Multi Processors System on Chip) architectures. This may be explained by the probabilities that provide this type of architectures, as a result of it ameliorates performances by duplicating computing units on identical chip. Besides, this tendency is boosted by technological advances allowing an extremely huge integration scale that's crucial to MPSOC fabrication. As a consequence, the challenge for MPSOCs has changed: presently, the calculation capability and so the vary of processors on identical chip square measure further and extra increasing and become typically on high of requests. The priority has become then to focus on communication and synchronization between theses processors therefore on ensure higher performances of the complete system. During this research paper we main focus on the minimization of power consumption rate for system on chip. The reason of power consumption more due to the clock skew. Basically clock skew is the difference generation of arrival time of the clocks. To minimize the the clock skew problem we implemented AMBA protocol with flip flop (Master Slave) as a memory element and reutilization of unused clock signal. This proposed method implemented on Xilinxs 14.1 and use also Model-Sim to simulate the behavior.

Other Details

Paper ID: IJSRDV5I30010
Published in: Volume : 5, Issue : 3
Publication Date: 01/06/2017
Page(s): 208-211

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