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CMVR-PWM Technique with Optimized Switching Losses for 3 Phase VSI

Author(s):

Jitendrakumar Gautam , FOPG, MEFGI, RAJKOT; Jay Raval, FOPG, MEFGI, RAJKOT; Vipul Joshi, FOPG, MEFGI, RAJKOT

Keywords:

RS- PWM, AZS-PWM, NS-PWM, VSV-PWM

Abstract

AC motor drives are sourced by Voltage Source inverters (VSI). Common-mode Voltages (CMV) are formed by VSIs, which causes drawbacks such as increased Electromagnetic Interference (EMI) and increased voltage stress to the winding insulation. To compensate for CMV, Hardware based and software based solutions are suggested. Hardware compensation includes installing additional filters, which has a size and cost penalty and additional power losses in additional hardware decreases the system efficiency. Many software improvements without modification in the circuit have been recommended to reduce CMV such as RS- PWM, AZS-PWM, NS-PWM, VSV-PWM, but these all methods have limitations under certain conditions. An effort to reduce CMV turns into increased switching losses hence, it is necessary to optimize the switching losses and CMV of VSI. The paper investigates the possibility of improvement in current rating capacity of voltage source inverter by reducing switching losses and reducing common mode voltage. New Common mode voltage reduction (CMVR)-PWM termed as Switching loss optimized (SLO)-CMVRPWM method is proposed to optimize the switching losses and CMV of 3 phases VSI. The performance of the proposed SLO-CMVRPWM is investigated experimentally. Experimental results show that proposed method produces less number of CMV spikes in compare to the conventional method. CMV measurement test results show that RMS value of CMV is less in SLO-CMVRPWM with compared to conventional SVPWM. The average rise in heat-sink temperature in proposed SLO-CMVRPWM method is less with compare to the conventional SVPWM method.

Other Details

Paper ID: IJSRDV5I30362
Published in: Volume : 5, Issue : 3
Publication Date: 01/06/2017
Page(s): 338-341

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