A Review on Energy and Area Efficient Three-Input XOR/XNORs with SCD Methodology |
Author(s): |
| S.Sivaiah , Guru Nanak Institute of Technology; I.Sharath Chandra, Guru Nanak Institute of Technology |
Keywords: |
| Energy Efficiency, Hybrid-CMOS Logic Style, Systematic Design Methodology, Three-input XOR/XNOR Circuits |
Abstract |
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In this paper, a Systematic Cell Design Methodology (SCDM) based on transmission gate in the category of hybrid-CMOS Logic style is proposed. (SCDM), which is an extension of Cell Design methodology (CDM), plays the essential role in designing efficient circuits. In this methodology, designer utilize various basic cells, including three independent inputs and two complementary outputs. XOR/XNOR circuits are proposed with high driving capability, full-balanced full-swing outputs and low number transistors of basic structure, high performance, operating at low voltages and excellent signal integrity. As an especial feature, the critical path of the presented designs consists of only two transistors, which causes low propagation delay. All simulations have been performed with Tanner EDA tool, in optimum state of the circuits from view point to achieve the minimum power and delay. They also outperform their counterparts exhibiting 17%–53% reduction in power. The simulation results demonstrate average power consumption of each component and the overall power consumption of the circuit at a defined supply voltage. |
Other Details |
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Paper ID: IJSRDV5I30680 Published in: Volume : 5, Issue : 3 Publication Date: 01/06/2017 Page(s): 779-783 |
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