High Speed Kogge Stone Adder Design |
Author(s): |
| Mythili S , SNS COLLEGE OF TECHNOLOGY; Senthil .K.M, Sns college of technology; D.sathish Kumar, Sns college of technology; S. Soundarya, Sns college of technology |
Keywords: |
| Addition, Kogge Stone Adder (KSA), Parallel Prefix adders (PPA), Xilinx, Simulation |
Abstract |
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An important component of digital computers is adders. Adders are used in many different parts of the digital computer. They are not only used in the Arithmetic Logic Unit (ALU) but also in address calculation. Adders are also used in multipliers and other functional units. One of the Most Prominent adders In VLSI Industry is Parallel Prefix adders. The Parallel Prefix Adder (PPA) is one of the fastest types of adder that had been created and developed. One of the common types of parallel prefix adder is Kogge Stone adder. In existing system by using the Xilinx 14.1 software, the designs for Kogge Stone adders was developed for 8-bit.This paper focuses on the implementation and simulation of 16-bit and 32 bit Kogge adder based on Verilog code and compared for their performance in Xilinx. Hence, this paper is significant in showing which of the adder being tested perform better in terms of computational delay based on different sizes of bits. |
Other Details |
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Paper ID: IJSRDV6I21356 Published in: Volume : 6, Issue : 2 Publication Date: 01/05/2018 Page(s): 2901-2904 |
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