Design of Differential Low Noise Amplifier using Different CMOS Process |
Author(s): |
| Faria Siddiqui , Mody university, Lakshmangarh(sikar) |
Keywords: |
| DLNA, Impedance Matching, CMOS Technology, Noise Figure, Gain |
Abstract |
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The objective of this paper is to design differential low noise amplifier using different technologies. We have designed 2.4 GHz DLNA using 0.18µm CMOS process, the DLNA is biased at 1.8 v supply and perfectly matched with input impedance of 50Ω.Then designed 21GHz UWB DLNA using 0.13µm CMOS process , the amplifier is driven by 1.2v power supply and after that designed 4.1 GHz narrowband DLNA using 0.18 CMOS process, applicable for global positioning system receivers with bandwidth 90MHz and stability of design is also verified. |
Other Details |
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Paper ID: IJSRDV6I30198 Published in: Volume : 6, Issue : 3 Publication Date: 01/06/2018 Page(s): 1045-1047 |
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