Design of Four Quadrant Current Mode Analog Multiplier at 0.25 um CMOS Technology |
Author(s): |
| Raksha Choudhary , SWAMI VIVEKANAND COLLEGE OF ENGINEERING INDORE(M.P.); Vijay Sharma, SWAMI VIVEKANAND COLLEGE OF ENGINEERING INDORE(M.P.) |
Keywords: |
| Analog Multiplier, CMOS Technology |
Abstract |
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For analog signal processing non-linear operation on signal is required there are several applications where analog signals need to be multiply/ divide and squaring is required such as modulation, AGC etc. The non-linearity of conventional bipolar transistor can be used for multiplication by using trans-linear operation but the large size and power consumption limits the use of BJT. Extension of trans-linear operation to MOS transistors solves the issue of size and power consumption but the scaling of MOS transistor produces several errors. Such error can be resolved by using two transistor and a resistor in trans-linear loop. In this paper a current mode four quadrant current multiplier was designed that uses current squaring and subtract identity to achieve multiplication. The circuit is designed at 0.25 µm CMOS technology at 1.8 V dual power supply. |
Other Details |
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Paper ID: IJSRDV6I30565 Published in: Volume : 6, Issue : 3 Publication Date: 01/06/2018 Page(s): 958-960 |
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