VLSI Implementation of Carry Select Adder Using Modified BEC |
Author(s): |
| Divya Chaturvedi , Gyan Ganga College of Technology; Assistant Professor Amit Chouksey, Gyan Ganga College of Technology |
Keywords: |
| Carry Select Adder, Adder, Mux, VLSI, BEC |
Abstract |
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To perform the fast arithmetic functions in many data processing processors at low cost, carry select adder is the most suitable adder among the various adders To design the power and area proficient fast speed data path logic systems, the field of very large scale integration (VLSI) is the generally significant area of research where minimize the area and power is the more difficult task. In digital system, mostly adders lie in the crucial paths that affect the whole performance of the system. Experimental analysis illustrates that the proposed architecture achieves advantages in terms of speed, area consumption and power. |
Other Details |
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Paper ID: IJSRDV6I80150 Published in: Volume : 6, Issue : 8 Publication Date: 01/11/2018 Page(s): 292-294 |
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